The present invention relates to semiconductor devices and methods of forming the same, and more particularly to field effect transistors, also referred to herein as “MOS transistors”, and methods of forming the same.
Some semiconductor devices may be used with high voltages. High voltage devices may be used to control high voltage or may be used in a circuit that requires high breakdown voltage (BV). A MOS transistor is a widely used high voltage-control device which consumes relatively low power. A conventional high voltage-control MOS transistor is described below with reference to the drawings.
FIG. 1 is a plan view of a conventional transistor, and FIG. 2 is a cross-sectional view cut along I-I′ line of FIG. 1.
Referring to FIGS. 1 and 2, field oxide 2 is disposed on a semiconductor substrate 1 to define a first region 3 and a second region 4 which are spaced from each other. A gate 7 is placed along the top of the first region 3 and it also covers a portion of field oxide 2 between the first and the third regions 3 and 4. A gate oxide 6 is interposed between the gate 7 and the top surface of the first region 3. The first region 3 which is below the gate 7 is a channel region.
A drain region is formed in the semiconductor substrate 1 on one portion of the channel region. The drain region is formed in a double diffused drain (DDD) structure. In other words, the drain region includes a lightly doped region 5 and a heavily doped region 8. The heavily doped region 8 is formed in the second region 4 and the lightly doped region 5 is formed in the semiconductor substrate 1 on one portion of the channel region to surround the heavily doped region 8. The lightly doped region 5 surrounds the heavily doped region 8 so as to lower the breakdown voltage between the drain region and the semiconductor substrate 1.
The first region 3 having the channel region has a first width 10 along a channel width direction, and the second region 4 has a second width 11 along the channel width direction. Generally the first width 10 of the first region is larger than the second width 11 of the second region 4. The first width 10 of the first region may be larger than the width along the channel width direction of the lightly doped region 5. This is arranged in order to reduce or prevent a short circuit between the drain region and a source region (not shown) each disposed on both sides of the gate 7.
The lightly doped region 5 is formed not only in the second region 4 but also formed under the field oxide 2. As a result, if the first width 10 of the first region 3 is equal or smaller than the second width 11 of the second region 4, the lightly doped region 5 and the source region may be electrically connected. In such cases, a defect may occur in the MOS transistor that control high voltage. Therefore, in order to reduce or prevent a short circuit between the drain region and source region the first width 10 of the first region 3 is formed in a larger than the second 11 with of the second region 4.
However, problems may also occur as a result of the first width 10 of the first region 3 being larger than the second width 11 of the second region 4. For example, an electric field 9 may be converged on one edge of the heavily doped region 8, as shown in FIG. 1, while the high voltage-control MOS transistor is turned on. Accordingly, a breakdown voltage in a turned on state (hereafter, turn-on breakdown voltage) of the high voltage-control MOS transistor may be decreased. As a result, a defect may occur in the high voltage-control MOS transistor. In FIG. 1, the arrow direction of the electric field 9 indicates movement direction of the electrons. In other words, the electric field 9 implies an electric field from the point of view of the electrons.